Many signal processing tasks require the calculation of sums of the form ##EQU1## for integers k=0,1, . . . , N-1 for sequences of real or complex numbers a.sub.o,a.sub.1, . . . , a.sub.N-1 and b.sub.o,b.sub.1, . . . ,b.sub.N-1.
The prior art convolver, or correlator, has the structure 10 shown in FIG. 1. The structure 10 consists of two one-dimensional shift registers, 12 and 14. Data can be input into either end, 12LE or 12RE of register 12 or 14LE or 14RE or register 14, or both ends of the shift registers depending on the design. The multiplier 16 can be either analog or digital. The summer 18 can be analog or digital also. The convolver or correlator 10 shown in FIG. 1 has been implemented using charge-coupled devices (CCD's), surface acoustic wave (SAW) devices, and the common digital technologies.
The invention described herein consists two two-dimensional shift registers instead of the two one-dimensional shift registers, 12 and 14, shown in FIG. 1. The invention allows more high-accuracy multiplications and sums to be performed simultaneously on a single chip than is possible using one-dimensional shift registers.